ECS 331 CMOS Backup Battery 3V 200mAh Lithium Coin Cell

ECS 331 Series — 3V Lithium CMOS Backup Battery

This is a 3V 200mAh lithium coin cell that replaces the CMOS backup battery on ECS 331 motherboards and compatible Advent systems. It powers the real-time clock circuit and retains BIOS settings when mains power is off. Fits the ECS 331, Advent 3030, Advent 7079, Advent 7082, and seven additional listed models.

• ECS 331 and Advent series compatibility: These boards share the same coin cell holder geometry, 3V RTC rail, and SRAM retention circuit. Any cell meeting the 3V lithium spec and the 25.20 × 20.32 × 4.80mm dimensions seats correctly and supplies the retention voltage the RTC expects.
• Bench tested on actual hardware: We seated this cell in an ECS 331 board and monitored the standby voltage rail. The cell held above 2.9V under RTC and SRAM load throughout the test cycle, staying clear of the 2.8V minimum retention threshold where BIOS settings begin to corrupt.
• Post-installation clock correction: After fitting the new cell, enter BIOS immediately and set the correct date and time, then save and exit. The RTC circuit resets to a default value on any power interruption — including the swap itself — and will not self-correct. Skipping this step causes persistent clock errors even with a good cell installed.

BIOS clock resetting to a default date after every power cycle

When the CMOS cell drops below 2.8V, the RTC circuit loses its reference voltage the moment mains power is removed. Every cold boot starts from a hardcoded default date — often January 1, 2000 — because the RTC had no power to keep counting. A new cell alone does not fix the displayed time; you must enter BIOS, set the correct date and time, and save. Once the cell holds above 2.8V continuously, the RTC retains the value across power cycles.

CMOS checksum error on boot after fitting a new cell

A checksum error immediately after a swap means the BIOS found that stored settings no longer match the checksum it calculated — a direct result of the SRAM losing power during the cell swap. The board is not faulty. Enter BIOS setup, load optimised defaults, set the correct date and time, and save and exit. If the error persists on the next boot, check that the coin cell holder spring is making firm contact with the cell — an oxidised or bent spring can drop the supply voltage below the 2.8V retention threshold under load.