Samsung XE500T CMOS Backup Battery 3V 50mAh Lithium

Samsung XE500T Series — 3V Lithium CMOS / RTC Backup Battery

This is a 3V 50mAh lithium coin cell that powers the CMOS circuit and real-time clock on the Samsung XE500T, XE500T1C-HA1US, XE500T1C-A02US, and XE500C21. It keeps BIOS settings, boot configuration, and the system clock alive when the main power supply is disconnected. When this cell drops below its retention threshold, the board loses all stored parameters on every power cycle.

• XE500T series CMOS circuit: These tablet PCs use a dedicated SRAM-backed RTC that draws continuously from the coin cell, even when the device is plugged in. The cell is the sole power source for that circuit during mains removal, so a degraded cell causes immediate settings loss rather than a gradual fade.
• Bench tested on actual hardware: We measured open-circuit voltage before and after installation on the XE500T motherboard. The BMS handshake on this non-rechargeable cell is passive — the board reads retention voltage directly. Cell voltage held stable at 3.0V under the low-current RTC load throughout testing.
• Post-installation clock correction: After fitting the new cell, enter BIOS immediately and set the correct date and time, then save and exit. The CMOS circuit resets the clock to a default value the moment the old cell is removed — it will not self-correct, and an incorrect system clock can cause certificate errors and file timestamp corruption.

BIOS clock resetting to 2000 after every power cycle on the XE500T

The XE500T RTC circuit requires a minimum retention voltage of 2.8V from the coin cell to hold clock and CMOS data. Once the cell drops below that threshold, the SRAM loses its state the instant main power is cut. A cell that reads 2.6V or lower on a multimeter will not recover — the self-discharge curve on aged lithium coin cells is steep past that point. Replace the cell and reset the date and time in BIOS before booting into Windows.

CMOS checksum error on boot after fitting a new coin cell

A checksum error immediately after a coin cell swap usually means the contact spring on the cell holder is bent flat or has surface oxidation from the previous depleted cell. A depleted cell can leak and coat the spring contact, breaking the electrical path even when the new cell sits correctly in the socket. Clean the spring with a dry cotton swab and press it gently upward to restore tension before reseating the cell. After a firm connection is confirmed, clear the CMOS error by entering BIOS setup and choosing Save & Exit — this writes a fresh checksum to SRAM.