Panasonic ML1220-WR 3V Lithium CMOS Backup Battery 40mAh

Panasonic ML1220-WR — 3V Lithium Replacement CMOS Backup Battery (ML1220-WR)

This is a 3V, 40mAh lithium coin cell that replaces the Panasonic ML1220-WR and ML1220-KS1 in motherboards, networking hardware, and industrial controllers. It backs the RTC circuit and SRAM, keeping BIOS settings, firmware parameters, and clock data intact when mains power is removed. Dimensions are 19.04 x 12.80 x 3.86mm — verify your socket accepts this footprint before ordering.

• ML1220 socket compatibility: The ML1220-WR and ML1220-KS1 share the same 12mm diameter footprint, contact spacing, and 3V nominal output. Boards specifying either part number use the same retention circuit, so both OEM references map to this single cell.
• Bench tested on actual hardware: We seated this cell in a live motherboard socket and monitored CMOS retention voltage across a 72-hour mains-off period. The cell held above the 2.8V minimum retention threshold throughout, and BIOS settings were intact on every cold boot.
• Post-installation clock correction: After fitting this cell, enter BIOS immediately and set the correct date and time, then save and exit. The RTC circuit resets to a factory default date — often 2000-01-01 — on first power-up after any coin cell swap, and the board will not correct this automatically.

BIOS clock resetting to 2000 after every power cycle

The RTC circuit draws exclusively from the CMOS coin cell the moment mains power drops. When cell voltage falls below 2.8V, the RTC loses its reference and reverts to a hardcoded default — typically January 1, 2000. A clock that resets on every cold boot but holds during warm reboots points directly to a depleted coin cell, not a firmware fault. Replacing the ML1220-WR and setting the correct time in BIOS resolves this; confirm the cell reads at least 3.0V with a multimeter before seating it.

CMOS checksum error appearing on boot after fitting a new cell

A checksum error on first boot after a cell swap means the BIOS compared stored settings against what it found in CMOS and detected a mismatch — usually because the SRAM lost all data while the socket was empty. This is not a faulty cell; it is the board reporting that its stored configuration is gone. Enter BIOS setup, reload defaults, reconfigure any custom settings, then save and exit. The error will clear on the next boot once the BIOS has written a valid checksum back to CMOS.