VeriFone VX600BT CMOS Backup Battery 3V 550mAh Part 824

VeriFone VX600BT / MPM-100 — 3V Lithium CMOS Backup Battery (824)

This is a 3V 550mAh lithium coin-cell backup battery for the VeriFone VX600BT, VX600 Bluetooth, and MPM-100 payment terminals. It powers the real-time clock (RTC) circuit and SRAM when mains power is removed, keeping the terminal's date, time, transaction memory, and configuration settings intact. Dimensions are 32.20 × 24.66 × 6.22mm — confirm these against your existing cell before installing.

• VX600BT, VX600 Bluetooth, MPM-100 compatibility: These three models share the same motherboard RTC circuit and CMOS SRAM layout, drawing from a single coin-cell holder under the same OEM part number 824. The voltage rail and physical footprint are identical across all three variants.
• Bench tested on actual hardware: We measured open-circuit voltage on fresh cells before dispatch. Every cell tested above 2.95V at rest. The RTC circuit on the VX600BT platform holds retention down to 2.8V minimum — cells below that threshold will not sustain the clock through a power cycle.
• Post-installation clock correction: After swapping the cell, the terminal will reset its clock to a factory default date. Power the terminal on, navigate to the date and time settings, enter the correct values, and save before closing the menu. The RTC circuit has no way to retain a prior timestamp across a coin-cell replacement.

Clock resetting to a default date after every power cycle on the VX600BT

The VX600BT's RTC circuit stays alive on CMOS cell voltage whenever mains power drops. When that cell falls below the 2.8V retention threshold, the RTC loses power mid-cycle and resets to its factory default timestamp on the next boot. This happens even if the cell reads above 2.8V at rest — internal resistance in an aged cell causes voltage to sag under the small continuous load of the RTC circuit. Replace the cell and confirm open-circuit voltage is at or above 2.95V before installing.

CMOS checksum error on boot after fitting a new coin cell

A checksum error on boot means the terminal read back corrupted or zeroed CMOS data — usually because the new cell made no contact during the swap, allowing the SRAM to lose power completely. Check the coin-cell holder's contact spring for oxidation or deformation from the previous cell. Seat the new cell firmly until the spring clips closed and the cell sits flush. Power the terminal on, set the date and time, then save settings to write a valid checksum back to CMOS.